• May 2011
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Chinese Chip Wins Energy-Efficiency Crown.

IEEE Spectrum (05/11) Joseph Calamia

The next Chinese supercomputer will use the Godson-3B processor, which can perform 128 billion floating-point operations per second while consuming only 40 watts, which tops the performance per watt of competing systems by at least 100 percent. The processor relies on a modified mesh network that features additional direct core connections to move data efficiently. The eight-core chip consists of two four-core clusters where each core sits on a corner of a square of interconnects. Each corner also is linked to its opposite through two diagonal interconnects that form an X through the square’s center. Both four-core units are connected via a crossbar interconnect, and the chip’s developers expect the scalability of their modified mesh to be an advantage as designers place more cores on future chips. Boosting the number of cores in a mesh puts a strain on the system, but Tilera’s Matthew Mattina says a mesh interconnect offers bandwidth scaling superior to that of the ring configuration typical of most microprocessors. Godson architect Yunji Chen says a mesh design also supports more favorable latency.


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