• September 2010
    M T W T F S S

Array Building Blocks: A Flexible Parallel Programming Model for Multicore and Many-Core Architectures.

Sept 02, 2010, by Intel Software and Service Group members. 

Microprocessor design and manufacturing process innovations continue to improve software application performance through both implicit and explicit mechanisms. In addition to improving performance, there is also now the new challenge of reducing power consumption in many applications of interest, such as in mobile devices. Multicore and many-core processors are one type of design evolution that can address both performance and power efficiency. In addition to multiple cores, such processors typically also include per-core vector units providing an additional level of parallelism.

The benefits of these architectures can only be fully realized by writing parallelized and vectorized code. Some of the existing approaches to parallelization include using Windows and POSIX thread APIs, using MPI, and using the OpenMP shared memory threaded programming model. Vectorization can be accomplished by using vector intrinsics or by depending on auto-vectorization in the compiler. However, using most existing programming models, combined with usage of threads and vector instructions requires a great deal of expertise from the programmer and often results in code that underperforms or that is overly tied to a specific processor architecture.